The Compression Attached Memory Module (CAMM) is truly a revolutionary memory form factor, which has its foundation in the use of compression mount technology (CMT), a set of electromechanical pin contacts, which form a land grid array that establish electrical contact by compressing the two contact faces, screwing the module to the substrate or PCB. This type of connector has shown great progress over the last years, significantly increasing its level of reliability, signal integrity, bandwidth and protection against electromagnetic interference, being widely used in various industrial and commercial applications, from telecommunications to semiconductor test sockets, and now having its use expanded within the memory segment.
However, one of the most prominent advantages of this type of connection lies in its modularization capabilities, allowing architectures that use it an unprecedented level of design flexibility.
Realizing the wide opportunity opened up by the use of this connector technology, Intel researchers have started an effort a few years ago to develop modularization solutions using CMT in their XPU architectures, having filed some very interesting patent applications in recent years that include the use of this technology, some of which are quite insightful and have the potential to revolutionize the market and the way we consume these electronic devices.
CMT on Memory on Package architecture
With the advent of the Memory on Package (MoP) architectures, many questions have been raised regarding the future of the platform. While MoP architecture brings substantial benefits, such as reduced memory access latency, there is also the possibility of a significant increase in chip temperature, which can result in thermal crosstalk—particularly in high-performance scenarios involving multiple memory accesses. Furthermore, the fact that the chip is soldered directly to the substrate means that the memory cannot be replaced in the event of failure or for upgrade purposes, making the platform much less attractive to consumers.
To address these issues, Intel filed two similar patent applications with different approaches, both involving the PCB of the CAMM memory module and the processor substrate being interconnected through a CMT interposer. The interposer with through-board compression connectors can be applied to a MoP architecture to provide high memory speed while allowing the system to removably connect the memory to the package substrate, enabling memory replacement.
This difference in approach is due to the variety of possible applications of MoP architecture and the fact that the patent applications predate standardization. In any case, the central idea remains the same in both instances, with this solution paving the way for the popularization of MoP architecture in a myriad of XPU designs. Thus, we may see GPUs or even FPGAs also adopting this approach in the coming years.
VRM design through the CMT
The design of voltage regulator circuits for XPU architectures is a headache for both electronics manufacturers and consumers, and for good reason. From an industry perspective, the close dependency between component suppliers and the final design of a product means that if the supply chain is disrupted—due to events beyond the manufacturers' control, such as pandemics, wars, or natural disasters—it can lead to the discontinuation of production of the specific product and its consequent shortage. Even the most lay reader will have witnessed this during the pandemic and felt its consequences firsthand.
From the consumer's point of view, the voltage regulation module (VRM) often offers little possibility for repair and is frequently so expensive that repair becomes unviable, depending on the product. Furthermore, in cases where the VRM exhibits coil whine, the issues surrounding replacement and warranty claims only exacerbate the problem.
It was this problematic relationship stemming from the current design of VRMs that motivated Intel researchers to file a patent application for power conversion solutions utilizing standardized modularized assemblies with a CMT connector, intended for use in SKUs of their XPU architectures. The core idea behind this is quite simple: submodularize the voltage regulation system design, reducing supply chain dependency while incrementally increasing product reliability and testability of the OEM platform. Furthermore, modularization through CMT significantly expands the possibilities for SKU diversification and enhances upgrade options for the consumer.
GDDR memory expander using CMT
It doesn’t matter if you are an AI developer or a casual gamer—you undoubtedly know that the biggest problem with the current GPU market is the limited amount of VRAM, especially in Nvidia GPUs. In fact, since the launch of the Turing architecture, it was already clear to any minimally qualified analyst that the increasing use of Deep Learning in games and the rising trend of higher texture quality would culminate in a greater need for VRAM in graphics devices.
From the perspective of AI programming, this has become even more evident with the exponential growth in model size and complexity. Coupled with the "Cambrian explosion" of applications requiring AI acceleration, the demand for more VRAM is steadily increasing for everyday graphics use. All of this will eventually culminate in the emergence of AI GPGPU, a development already predicted by Intel and discussed by me in other articles.
Therefore, there is a very clear need to increase the amount of VRAM in GPUs—not only to eliminate artificial market segmentation, which results in SKUs being differentiated solely by the amount of memory without adding additional features, but also to avoid the premature obsolescence of SKU models due to insufficient memory.
To address this problem, Intel filed a patent application for a GDDR expander module that would connect to the GPU via a CMT connector. This design allows for the stacking of GDDR modules using a split-channel configuration, enabling multiple devices with dedicated signals routed to each module and achieving maximum memory scalability. The patent application also outlines a clear roadmap for the development of modules with GDDR7 memory. With this patent, Intel proposes a complete radical shift in the GPU market as a whole, effectively eliminating the artificial market segmentation that currently exists.
High density interposers - The ultimate HPC solution
Finally, we cannot overlook an excellent example of applying CMT to address a current challenge in high-performance computing and AI clusters: the limit on the number of DIMM memory channels available in server systems.
The rising demand for memory has significantly increased the need for memory channels, which, in turn, raises the pin count in the host system. This ultimately leads to increased electrical channel complexity, along with challenges related to crosstalk and channel routing. In fact, even with short memory channels and memory close to the processor, it is very difficult to maintain the requirements that a server system has for memory, such as modularity, configurability for high channel count and high bandwidth and high capacity, using the current DIMM standard.
To address these issues, Intel filed a patent application proposing the implementation of compression-attached memory modules, which are attached to the processor interposer. This design creates a memory channel that is electrically superior to using DIMMs with a socket while retaining the modularity of DIMM-based memory systems. The CAMM memory modules provide an improved cooling solution for the system, enabling a single heat sink to cover both the processor and multiple memory channels. Furthermore, the low-profile CAMM form factor supports a higher memory channel count, with at least twice as many channels, while still allowing the system to accommodate a 2-socket spread core in a 19″ rack.
The wind of change is coming
The examples presented here summarize a trend that the entire industry will have to follow in the coming years, whether they like it or not. Compression mount connectors are a well-established technology, and the emergence of the JEDEC CAMM standard only highlights the strength of this trend. Companies like Amphenol, which offer customizable compression-mount interposer solutions, will be able to provide both for Intel and its competitors with the same level of flexibility and performance.
The main point to discuss here is the fact that, at the time of the research for this article, neither AMD nor Nvidia have anything similar in their patent portfolios. Thus, Intel is ahead of its competitors in proposing solutions to real-world problems that other companies are reluctant to address—either due to development costs (very unlikely) or because they benefit from the artificial market segmentation established by current standards.
Regardless of the reasons for this behavior, Intel's patent applications discussed here have the potential to revolutionize the market. The winds of change are clearly blowing, but it remains to be seen whether Nvidia and AMD will be caught off guard.
Some references and further reading:
US20230006374 - Memory on package with interposer with compression-based connectors - Lim et al. - Intel [Link]
US20230005882 - Memory on package (MoP) with reverse CAMM (Compression Attached Memory Module) and CMT connector - Vergis et al. - Intel [Link]
US20220353991 - Stackable memory module with double-sided compression contact pads - Li et al. - Intel [Link]
US20220361328 - Power conversion module using CMT connector - Li et al. - Intel [Link]
US20230007775 - GDDR memory expander using CMT connector - Li et al. - Intel [Link]
US20240364037 - CAMM connector pin with multi-spring (dual bend direction) levers - Hanks et al. - Intel [Link]
US20240080988 - High density interposers with modular memory units - Hinck et al. - Intel [Link]
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